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  • One for the programmers! (Hex content)
  • GrahamS
    Full Member

    Well integer division works just like that on a computer, though in binary. Hence for 32 bit integers you potentially have 32 times round a loop, each loop potentially consisting of 4 compares, 4 subtractions, 8 shifts – there’s 512 cycles for you without any other loop overheads (elliptic has a 16 bit system, so you should be able to divide that by 2). How else would a computer be able to do integer division?

    Well there are certainly DIV and IDIV instructions in x86 assembler so I don’t think it takes as many CPU cycles as you think it does.

    molgrips
    Free Member

    Yes but each instruction has a clock cycle cost, Graham. Like I say it depends on how it’s been implemented in the instruction set I guess. I seem to remember reading that x86 had instructions that did complex tasks and took many many cycles. Perhaps this is one of them.

    GrahamS
    Full Member

    Yeah they do, but just not as many as aracer was suggesting.

    Take a looky at this lovely document:
    Intel® 64 and IA-32 Architectures Optimization Reference Manual (PDF)

    You’ll be wanting Table C-13 which tells you the Latency for a DIV operation on a 0F_3H CPUID is between 66 and 80 cycles. 🙂

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