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  • any DSP filter experters in the house?
  • UrbanHiker
    Free Member

    Looking at a problem potentially requiring DSP filter design. I know next to nothing. Just want to pick somebodies brains about sample rates and frequency response. Ether that or be pointed at a useful laymans resource.

    bigjim
    Full Member
    dmorts
    Full Member

    Not an expert but have done some digital filter design in the past…

    What’s the application?

    UrbanHiker
    Free Member

    Electricity measurement. We sample at a fixed 8.4kHz, and want to implement a low pass filter with a cut off frequency of 4.1kHz (barely below Fs/2), with very low ripple in the passband. Just wondering it we’re clutching at straws?

    In reality the system was never designed with this type of functionality in mind. I think we should probably rip up the design, and start from scratch with a much higher sample rate.

    The main issues it that any of the only literature quickly strays into quite complex maths, and makes my brain hurt! I’m beginning to understand the basics, but the relationship between sample frequency and potential filter response I’m struggling to get a basic grip on.

    Cheers,

    dmorts
    Full Member

    What’s the purpose of the filter, anti-aliasing? Just wondering why the cut-off frequency is 4.1kHz?

    EDIT: I’m just re-remembering some stuff and may reply more later. I’m sure the sample rate/response thing is straight forward…ish

    UrbanHiker
    Free Member

    BigJim, sorry missed your post earlier. Ta for that, looks like a good resource.

    Dmorts, Cheers for the input. I’ve been reading more, and things are now starting to make proper sense, in how things should work in theory at least.

    So, here’s the issue. We sample at 8400Hz, the highest frequency we’re interested in measuring is 4095Hz. In some of the EMC tests, we’re getting crazy readings from high frequency (>100kHz) radiated immunity. So our (lazy) hardware eng suggests that instead of these high freq signals being knocked out by hardware, I can just do it via DSP.

    My assumption was that I’d be able to create a DSP low pass filter that would cut off all frequencies above 4100Hz (just above highest 4095Hz we’re interested in).

    I’d just assumed that this would cut out all F above 4100Hz. I’ve only just worked out (after 2.5days reading up) that it doesn’t work like that. Doh!

    Now I understand the concept of aliasing, and a bit of Nyquest/shannon, I can go back to said (lazy) hardware eng and tell him he’s going to have to help me out with some pre-ADC filtering.

    Any more input most welcome 🙂

    longwayhome
    Free Member

    You are correct about the issue of aliasing and needing a much higher sampling frequency where you do the filtering.

    With such a large difference between the interference you are trying to filter out and the frequency you are trying to measure it should be easy to get a low ripple passband i.e. Butterworth response. Will also probably mean a relatively simple filter (low number of coefficients)

    UrbanHiker
    Free Member

    Longwayhome, nice one sounds like you know what you’re talking about.

    In my scenario the sampling frequency is fixed, we’re already pushing everything to the limits, so can’t increase that. Hence bouncing it back to h/w.

    Presumably its common to filter/anti-alias in hardware before the DSP picks things up anyway. Sounds like a sensible way to do things from my (lazy) firmware perspective.

    longwayhome
    Free Member

    It is not uncommon to do anti-aliasing filtering in what is usually termed the analogue domain (i.e. with tuned components like capacitors and inductors) before sampling but your frequency is quite low (not necessarily a problem if that’ what you need for your application).

    In comms it’s usual to get signals into the digital domain as soon as possible because digital filters (i.e. DSP) don’t suffer from age/temperature variations nearly as much as analogue filters using analogue components.

    But yes, if your digital sampling frequency is fixed at 8.4 kHz you need to get your analogue engineer to design a low pass filter with a cut-off point something like 20 kHz. Comments about a relatively simple/cheap design due to difference in pass/stop band still apply.

    You then need to think about the accuracy of your measurements. How are you planning to do them? With and FFT where you need to compare the level of your 4.1 kHz with other frequencies or just the 4.1 kHz using a Goertzel algorithm? Is it in hardware (FPGA) or on a processor?

    dmorts
    Full Member

    Presumably its common to filter/anti-alias in hardware before the DSP picks things up anyway. Sounds like a sensible way to do things from my (lazy) firmware perspective.

    Yes, you anti-alias filter in hardware before you ADC.

    As I see it, as your frequency of interest (4.1 kHz) is close to fs/2 you’ll have to be careful trading off anti-aliasing with preserving what’s at 4.1 kHz.
    Due to the roll off of the filter, keeping 4.1 kHz in the flat passband and significantly attenuating everything above 4.2 kHz might be tricky.

    Thing is, are you sure there isn’t an anti-aliasing filter in there already? It’s pretty much essential, unless you’re sure your to-be-sampled signal has no content above fs/2.

    Is it that the 100 kHz is getting in pre-ADC and post the anti-aliasing filter? Poor screening, for example?*

    *Speculative, my domain is audio frequencies!

    UrbanHiker
    Free Member

    Having had a quick look back at the analogue side of things, there is definitely a low pass filter in there. The trouble is the original designer is no longer with us, and I’ve not come across any design notes. So we just have the cct. I may try an work out what sort of filter characteristics it should be exhibiting.

    The measurements side of things are all done, a mix of grade 1 maths and ffts. In fact to product is finished and selling. It’s just that we’re trying to get it though a new set of EMC tests, and its being picked up on this one radiated immunity fail. It may well be that we’re missing something simple, or may be that the signal is bypassing the filter stage. So some work needs to be done in that area, trouble is we’re short of experienced hands, so everything is slow.

    Given the option to start again, or when we have a chance to do version 2, upping the sample rate and making more extensive use of the dsp chip (cpu) facilities is definitely on the cards. But during the initial design we had quite a few naive moments! Still we learned, and it was good fun.

    LongWayHome and Dmorts, thanks to you both.

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